My feedback

1. Support VHDL & Verilog Code Snippets

   16 votes

   Vote Vote Vote

   Sign in

   prestine

   Your name

   Your email address

   (thinking…)

   

   Password

   Sign in with: Facebook Google

   Forgot password?

   Create a password

   I agree to the terms of service

   Signed in as (Sign out)

   Close

   Close

   Vote

   We’ll send you updates on this idea

   4 comments  ·  Public » Messaging  ·  Flag idea as inappropriate…Flag idea as inappropriate…  ·  Delete…  ·  Admin →
   Arthur DUMAS supported this idea  ·  Apr 14, 2020
   An error occurred while saving the comment
   Arthur DUMAS commented  ·  Apr 14, 2020  ·  Edit…  ·  Delete…

   +1 For the Mike Miller's comment: Use the same format json as the one we use on VS Code extension.

   Save Submitting...