Mike Miller ← Microsoft Teams UserVoice My feedback Support VHDL & Verilog Code Snippets 16 votes Vote Vote Vote Sign in prestine Your name Your email address (thinking…) Password Sign in with: Facebook Google Forgot password? Create a password I agree to the terms of service Signed in as (Sign out) Close Close Vote We’ll send you updates on this idea 4 comments · Public » Messaging · Flag idea as inappropriate…Flag idea as inappropriate… · Delete… · Admin → Mike Miller supported this idea · Sep 23, 2019 An error occurred while saving the comment Mike Miller commented · Sep 23, 2019 · Edit… · Delete… Maybe we could reuse the syntax highlighting rules from VS Code? That would be clever :-) Save Submitting...
Maybe we could reuse the syntax highlighting rules from VS Code? That would be clever :-)