Support VHDL & Verilog Code Snippets
Code snippets are great, but my Team's languages are not yet supported. We use VHDL-2008 and SystemVerilog and would like to be able to share syntax-highlighted code snippets.
Alternately, the ability to add support for custom languages would be fine too. We are not adverse to writing our own syntax highlighting rules.
Jack Russell Bruce commented
+1 Need HDL code support!
Arthur DUMAS commented
+1 For the Mike Miller's comment: Use the same format json as the one we use on VS Code extension.
Mike Miller commented
Maybe we could reuse the syntax highlighting rules from VS Code? That would be clever :-)
Daniel Rodriguez commented
This would be very useful. We would also like SystemVerilog support.